brainfiller wrote:
I think Zog hit it on the head here. On the surface their logic of 14 kA and 10 kA might make sense but there is still some debate on how to handle low magnitude arcing currents. Most people have probably seen that very low currents can yield very long device clearing times which translates into more incident energy. The question is: is any of this realistic? There are many schools of thought such as the 125 kVA xfmr / < 240V exclusion clause in 1584, 2 second cut off, will the low level arc even sustain itself etc. Unfortuanely there is not a clear cut answer so people are "being creative" to justify minimizing the effort. If they get too creative, it might be difficult to explain in a legal setting.
A friend of mine at Westex has done some arc flash testing at KEMA on 208V 125kVA and says he has seen arcs sustain themselves below the IEEE 1585threshold level, I dont remmember what Ei's he observed but they were high enough.
I guess there needs to be a cutoff point somewhere, and I am sure IEEE did thier homework on that level, but I can see that changing in the future. However, you need to find a point where the "Risk" level is low enough to ignore the "hazard", we will never, ever, be able to protect all workers from arc flash injuries. There is a chance, my computer battery could explode as I type this message, it has happened, but should we require PPE when working on a notebook PC?