Hi everyone.
Some of the equipment we need to complete arc flash studies for have vertical insulating barriers installed between each phase (for example - 12.47kV-600/347V live front padmounted transformers [photos attached] and 15kV outdoor metal enclosed switchgear). My question is, in these cases, should we be considering the direct electrode to electrode gap as if the glastic barriers were not in place or should we be considering the electrode gap to be the shortest distance between electrode taking the path around the glastic barriers?
I have tried doing a good amount of research but cannot find anything discussing one way or the other. I've found many articles which mention insulating barriers holding up quite well, being charred but not burned through during arc flash incidents, but have also found a source stating the resin in glastic barriers melts as low as 232degC (450degF). The one concern I see with considering the longer path is that it will almost certainly exceed the IEEE 1584-18 maximum bus gaps, resulting in needing to use the less favorable/ accurate Ralph-Lee method (Milsoft, online calculators, and the IEEE spreadsheet will not perform the analysis if the parameters are outside of the IEEE 1584 bounds).
If anyone could provide their thoughts or experiences, it would be greatly appreciated.
Thanks!
Serge
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Livefront Padmount with Glastic Barrier 2.PNG [ 762.98 KiB | Viewed 2423 times ] |
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Livefront Padmount with Glastic Barrier.PNG [ 380.95 KiB | Viewed 2423 times ] |